The present invention relates to monolithic integrated circuits formed with active devices provided on an insulator and, more particularly, to complementary active devices formed on an insulator.
The use of a dielectric layer, particularly a silicon dioxide layer, has become common recently for electrically isolating a plurality of semiconductor material substrates provided thereon, to be used in forming circuit devices, from the remaining semiconductor material on which such a dielectric layer is provided. Thick field oxide is typically further provided between the semiconductor material substrates to also electrically isolate them from one another. Reduced parasitic capacitances result with respect to circuit devices in such a silicon-on-insulator (SOI) structures as compared to those resulting with respect to circuit devices formed in and on the surface of a single semiconductor material body as has been more typically done heretofore in monolithic integrated circuits, i.e. bulk semiconductor material monolithic integrated circuits. As a result, such SOI circuit devices so isolated can operate at higher rates than those in bulk semiconductor material monolithic integrated circuits.
The active circuit devices most commonly formed in such SOI semiconductor material substrates are insulated gate field-effect transistors or, more usually, metal-oxide-silicon field-effect transistors (MOSFET's). The presence of a limited volume of silicon material typically used to form each of such semiconductor material substrates in which MOSFET's are fabricated, and the absence of any electrical contact thereto in the channel region beneath the gate, can give rise to some unusual effects in those MOSFET's including (a) the "kink" effect involving sharp changes in the saturation region characteristics over a small change in the drain-to-source voltage applied thereto, (b) the anomalous subthreshold effect involving the gate voltage change required to reduce drain current in the subthreshold region, and (c) the "snapback" problem involving positive feedback which can cause a single MOSFET to latch at some operating point. The kink effect is undesirable in analog circuits in providing the possibility of unwanted current overshoots during operation.
The kink effect arises as the voltage between the drain and source is increased so that avalanche breakdown can occur near the drain. The resulting electrons move into the drain as do the electrons in the drain current, but the holes which result from impact ionization in the high-electric field region near the drain move into the substrate to accumulate sufficiently to forward bias the substrate-source junction. This causes the threshold voltage of the device to be reduced and the drain current to jump to a higher level. The kink effect is known to be avoidable by forming a MOSFET device having a channel region which is fully depleted of charge carriers.
At extremely cold temperatures, MOSFET's formed in bulk monolithic integrated circuits can behave very much like MOSFET's in silicon-on-insulator structures because they experience "carrier freeze-out" in which hole and electron generation becomes so low that there is effectively no current flow between the channel region and portions deeper in the semiconductor material substrate, i.e. the channel region is effectively electrically disconnected from the rest of the substrate. The structure remains highly resistive until the critical field from impurity ionization is exceeded, i.e. breakdown. The free carriers will be generated by contact barrier, impurity, or band to bands breakdown by the lateral electrical field (essentially drain fields). The impact ionization will occur in the higher electrical field in the pinch-off region to cause holes to flow into the substrate and accumulate in source-substrate junction regions at cryogenic temperatures. As a result, known MOSFET structures in bulk monolithic integrated circuits often exhibit the kink effect at sufficiently low temperatures, temperatures on the order of tens of degrees Kelvin.
Because depleting the channel region of such devices in bulk monolithic integrated circuits cannot be accomplished, or reliably accomplished at cold temperatures, there is a strong incentive to use MOSFET's formed in SOI monolithic integrated circuits. A further consideration is the forming of complementary MOSFET's (forming both n-channel and p-channel devices together) so that complementary MOSFET circuitry (CMOS) can be used in such SOI monolithic integrated circuits. Such circuitry has the desirable characteristics of consuming low power, having large noise margins, and lower radiation sensitivity. Thus, there is a desire to form complementary MOSFET's in silicon-on-insulator circuitry which avoid the kink effect, are relatively radiation hard, and relatively economical to fabricate.